Tl;dr: we're designing a MIPS CPU in Hardcaml to explore how OCaml's functional style and static type system can make hardware design and testing easier.
Last semester, I took Penn State's CMPEN331, a required computer engineering course for CS, CompEng, and EE majors. The class centered around a set of projects where we gradually designed a 5-stage pipelined MIPS CPU in Verilog. I came away from CMPEN331 with a better understanding of how computers actually work below the surface, and a much greater appreciation for hardware design (thanks Professor Almekkawy!).
A few months ago, I finally got around to listening to the excellent Signals and Threads podcast. Because I was taking a hardware class at the time (and was curious as to real world applications), I started with the Programmable Hardware episode. Here I learned about the advantages and disadvantages of FPGAs (reprogrammable chips) vs ASICs (custom chips), how FPGAs can be useful in finance, and some thoughts on the software engineering vs hardware engineering worlds. And (most importantly to this post) I found out about Hardcaml, a library that allows designing hardware in OCaml.
This really piqued my interest. While working on my class projects, it felt like most of my frustration / issues originated from the Verilog language / tooling. I'll talk more about this later, but to give a brief example, a friend and I once spent over an hour debugging an issue, only to find out that I mispelled a wire name. Most modern languages wouldn't even let that compile/run. This made the concept of Hardcaml really interesting because OCaml is functional, compiled, and statically typed. Also (and somewhat more importantly), Hardcaml supports testing, meaning that all the superpowers of software testing could now also be applied to hardware.
With this in mind, I decided to recreate the MIPS CPU we designed in CMPEN331 using Hardcaml over the summer. I also somehow convinced my friend Mayur (@DoperBeats) to work on this with me. Over the coming weeks/months/hopefully it won't take years, we'll be building this over on GitHub. Neither of us knows OCaml or Hardcaml, so this should be fun!
In this blog series, I'll be documenting our progress and providing some background on what we're doing. This is mostly intended as a way to formalize my thoughts and practice writing (it's my first time blogging, yay!), but maybe some of it will be useful to people interested in hardware, OCaml, or Hardcaml down the line.